ELEC 3004 Digital Systems 2
Credit Points 10
Legacy Code 300019
Coordinator Qi Cheng Opens in new window
Description This unit covers modern logic design techniques and the process of creating logic circuits and systems from design specifications to implementation. Topics include logic design techniques for combinational and sequential logic circuits; hardware description language (HDL); logic circuit implementation using an HDL; state-of-the-art logic circuit design tools; and programmable logic devices.
School Eng, Design & Built Env
Discipline Communications Technologies
Student Contribution Band HECS Band 2 10cp
Check your HECS Band contribution amount via the Fees page.
Level Undergraduate Level 3 subject
Pre-requisite(s) ELEC 1001
Learning Outcomes
- Describe functions of encoders/decoders, adders/subtractors, multiplexers/demultiplexers and their design procedures; and design them using VHDL (combinational logic)
- Describe functions of flip-flops, registers, counters, finite-state machines and their design procedures; and design them using VHDL (sequential logic)
- Build ALUs using VHDL
- Describe VHDL memory functions and use them to design RAM units
- Describe VHDL bus and I/O functions and use them to design bidirectional bus and tri-state buses
- Implement logic circuits on FPGA boards
Subject Content
State diagram, state table
Logic circuit design
Hardware description languages (VHDL)
Statements, structures, data, variable, signal, type
Logic circuit modelling using VHDL
RAM implementation
Bus implementation
ALU implementation
Field programmable gate array devices
Implementation of logic circuits on FPGA
Assessment
The following table summarises the standard assessment tasks for this subject. Please note this is a guide only. Assessment tasks are regularly updated, where there is a difference your Learning Guide takes precedence.
Item | Length | Percent | Threshold | Individual/Group Task |
---|---|---|---|---|
Numerical Problem Solving | Approximately 10 questions each, individual theoretical and programming tasks | 15 | N | Individual |
Practical | 3 hours per session/Approximately 5-10 pages | 20 | N | Individual |
Final Exam | 2 hours | 65 | N | Individual |
Teaching Periods
Sydney City Campus - Term 1
Sydney City
Day
Subject Contact Peter Lendrum Opens in new window
View timetable Opens in new window
Spring
Penrith (Kingswood)
Day
Subject Contact Qi Cheng Opens in new window
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Sydney City Campus - Term 3
Sydney City
Day
Subject Contact Peter Lendrum Opens in new window