Credit Points 10

Legacy Code 800229

Coordinator Ying Xu Opens in new window

Description Efficient, parallel, low-power computation is a hallmark of brain computation and the goal of neuromorphic engineering. The focus of this subject is to design, implement and test accurate, electronic, very large scale integrated (VLSI) circuit model of neural systems and the associated signal processing. Students will have opportunities to design and build a neural system on hardware and gain resultant insights into applying neuromorphic engineering to real-world problems. This subject will be undertaken at Parramatta City - Hassall St campus.

School Graduate Research School

Discipline Electronic Engineering

Student Contribution Band HECS Band 2 10cp

Check your HECS Band contribution amount via the Fees page.

Level Postgraduate Coursework Level 6 subject

Restrictions

Students must be enrolled in 8124 Master of Applied Neuromorphic Engineering

Learning Outcomes

On successful completion of this subject, students should be able to:

1. Design and implement Leaky Integrate-and-Fire (LIF) neuron circuits on Field-Programmable Gate Arrays (FPGAs) using Verilog Hardware Description Language (HDL).
2. Develop and implement spiking neural network systems to process event-based data using Verilog/Python
3. Develop a solution-orientated way of critically assessing real-world problems architecturally
4. Communicate the significance and impact of digital neuromorphic systems to non-specialist audiences

Subject Content

- Model and design Leaky knowledge of Integrate-and-Fire (LIF) neuron circuits on a hardware platform using a Hardware description language
- Knowledge and skills of implementing a High-speed interface between a hardware platform and PCs to realise high speed data transmission between the hardware and PCs
- Skills of designing and implementing a LIF neural network system on a hardware platform and PCs
- Knowledge and skills of architectural design of a neuromorphic system